Parity Coding Mode Initialization; Parity Coding Mode Output; Configuration Examples; Programming A General Circuit In Parity Coding Mode - Motorola DSP56305 User Manual

14.6.5.1

Parity Coding Mode Initialization

Assuming the CCOP is in CCOP individual reset state, a Parity Coding processing
session is initiated by the following steps. There is no required order to these steps
except that data should be written to the CFSRs and CDFR while CCOP is enabled (CEN
in CCSR is set), and the counter and configuration registers (CCNT, CSFS, CSFTA, and
CSFTB) should be written when the processing is disabled (PREN in CCSR is cleared).
1. Enable CCOP in Parity Coding mode (in CCSR: set CEN, clear PREN, set OPM1,
and program OPM0, LRC, and HOZD as required).
2. Initialize CFSRs value if required (CFSRA only or both CSFRA and CFSRB).
3. Configure CFSRz parameter registers as required by the Parity Coding algorithm
(CFBTz, CFFTz, CBSRz, and CMSKz).
4. Initialize the counter register (CCNT) and input enable bits (INE[1:0] in CSFTB).
Notice that INE0 = INE1 if OPM[1:0] = 11.
5. Write the input data block into the Data FIFO Register (CDFR).
6. Enable processing (set PREN in CCSR).
14.6.5.2

Parity Coding Mode Output

After Parity Coding processing is completed (i.e., PCDN is set), the DSP56300 core
should read the contents of the CCNT counter and the CFSRs as needed. For data blocks
larger than the CDFR capacity, it is possible to use continuous mode (CM is set), or to
divide the data block into several parts and execute Parity Coding processing on each
part separately.
14.7

CONFIGURATION EXAMPLES

This section describes three examples of configuring the CCOP for some common
situations in Parity Coding.
14.7.1

Programming a general circuit in Parity Coding mode

Figure 14-9 illustrates a general circuit for multiplying the data sequence D(x) by a
multiplication polynomial
dividing the product by a n-degree polynomial
G x ( ) ⋅
= 1 + g x + g
1
for implementing shortened cyclic codes, the kind of code to which Fire codes for burst
error correction belong.
MOTOROLA
M x ( )
= m +
0
2
⋅ ⋅ ⋅ ⋅
x + + g
2
DSP56305 User's Manual
CYCLIC CODE CO-PROCESSOR
2
x ⋅ ⋅ ⋅ ⋅ ⋅
m + m x +
1 2
n 1 – n
⋅
. This circuit is commonly used
x + x
n 1 –
Configuration Examples
n 1 –
⋅
and
+ m x
n 1 –
14-27