Table 7-2 Essi Word Length Selection - Motorola DSP56305 User Manual

24-bit digital signal processor
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7.4.1.7
Word Length Control (WL[2:0]) CRA Bits 21-19
The WL[2:0] bits are used to select the length of the data words being transferred via the
ESSI. Word lengths of 8-, 12-, 16-, 24-, or 32- bits may be selected (see Table 7-2). The
ESSI data path programming model in Figure 7-19 and Figure 7-20 has additional
information on selecting different length data words. The ESSI data registers are 24 bits
long. The ESSI transmits 32-bit words either by duplicating the last bit 8 times when
WL[2:0] = 100, or by duplicating the first bit 8 times when WL[2:0] = 101. The WL[2:0]
bits are cleared by a hardware reset signal or by a software reset instruction.
WL2
0
0
0
0
1
1
1
1
7.4.1.8
Select SC1 as Transmitter 0 Drive Enable (SSC1) CRA Bit 22
The SSC1 bit controls SC1 signal functionality (see Figure 7-4). If SSC1 = 1, and the
following three conditions hold: the ESSI is configured in Synchronous mode (SYN = 1),
transmitter 2 is disabled (TE2 = 0), and the SC1 signal is configured as output (SCD1 = 1),
then the SC1 signal is the driver enable for transmitter 0. This enables the use of an
external buffer for the transmitter 0 output. If SSC1 = 0, and the same three conditions
hold: the ESSI is configured in Synchronous mode (SYN = 1), transmitter 2 is disabled
(TE2 = 0), and the SC1 signal is configured as output (SCD1 = 1), then the SC1 signal is
the serial I/O flag. The reset value is cleared.
7.4.1.9
Reserved CRA Bit 23
This bit is reserved. It is read as 0 and should be written with 0.
MOTOROLA
Enhanced Synchronous Serial Interface (ESSI)

Table 7-2 ESSI Word Length Selection

WL1
WL0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
DSP56305 User's Manual
ESSI Programming Model
Number of Bits/Word
8
12
16
24
32
(valid data in the first 24 bits)
32
(valid data in the last 24 bits)
Reserved
Reserved
7-19

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