Motorola DSP56305 User Manual page 89

24-bit digital signal processor
Table of Contents

Advertisement

Table 2-11 Enhanced Synchronous Serial Interface 0 (ESSI0) (Continued)
Signal
Type
Name
SCK0
Input/
Output
PC3
Input or
Output
SRD0
Input/
Output
PC4
Input or
Output
MOTOROLA
Enhanced Synchronous Serial Interface 0 (ESSI0)
State During
Reset
Stop
Input
Disconnected
Input
Disconnected
DSP56305 User's Manual
Signal/Connection Descriptions
Signal Description
Serial Clock—SCK0 is a bidirectional
Schmitt-trigger input signal providing the serial
bit rate clock for the ESSI interface. The SCK0 is
a clock input or output used by both the
transmitter and receiver in Synchronous modes,
or by the transmitter in Asynchronous modes.
Although an external serial clock can be
independent of and asynchronous to the DSP
system clock, it must exceed the minimum clock
cycle time of 6 T (i.e., the system clock
frequency must be at least three times the
external ESSI clock frequency). The ESSI needs
at least three DSP phases inside each half of the
serial clock.
Port C 3—The default configuration following
reset is GPIO input PC3. When configured as
PC3, signal direction is controlled through
PRR0. The signal can be configured as an ESSI
signal SCK0 through PCR0.
This input is 5 V tolerant.
Serial Receive Data—SRD0 receives serial data
and transfers the data to the ESSI receive shift
register. SRD0 is an input when data is being
received.
Port C 4—The default configuration following
reset is GPIO input PC4. When configured as
PC4, signal direction is controlled through
PRR0. The signal can be configured as an ESSI
signal SRD0 through PCR0.
This input is 5 V tolerant.
2-31

Advertisement

Table of Contents
loading

Table of Contents