Mode 8: Expanded Mode; Mode 9: Bootstrap From Byte-Wide External Memory; Mode A: Bootstrap Through Sci - Motorola DSP56305 User Manual

24-bit digital signal processor
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Core Configuration
Bootstrap Program
4.3.4

Mode 8: Expanded Mode

Mode
MODD
8
1
The bootstrap ROM is bypassed and the DSP56305 starts fetching instructions beginning
at address $008000. Memory accesses are performed using SRAM memory access type
with 31 wait states and no address attributes selected.
4.3.5

Mode 9: Bootstrap From Byte-Wide External Memory

Mode
MODD
9
1
The bootstrap program loads instructions through Port A from external byte-wide
memory, starting at P:$D00000 (bits 7–0). The SRAM memory access type is selected by
the values in Address Attribute Register 1 (AAR1). Thirty-one (31) wait states are
inserted between each memory access. Address $D00000 is reflected as address $00000
on Port A signals HA0–HA17.
4.3.6

Mode A: Bootstrap Through SCI

Mode
MODD
A
1
Instructions are loaded through the SCI. The bootstrap program sets the SCI to operate
in 10-bit Asynchronous mode, with 1 start bit, 8 data bits, 1 stop bit, and no parity. Data
is received in this order; start bit, 8 data bits (Least Significant Bit first), and one stop bit.
Data is aligned in the SCI Receive Data Register with the Least Significant Bit of the least
significant byte of the received data appearing at bit 0.The user must provide an external
clock source with a frequency at least 16 times the transmission data rate. Each byte
received by the SCI is echoed back through the SCI transmitter to the external
transmitter.
4-8
MODC
MODB
0
0
MODC
MODB
MODA
0
0
MODC
MODB
MODA
0
1
DSP56305 User's Manual
Reset
MODA
Vector
0
$008000
Reset
Vector
1
$FF0000
Bootstrap from byte-wide
memory (at $D00000)
Reset
Vector
0
$FF0000
Bootstrap through SCI
Description
Expanded mode
Description
Description
MOTOROLA

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