Target Retry (Trty) Bit 10; Pci Time Out (To) Bit 11; Host Data Transfer Complete (Hdtc) Bit 12 - Motorola DSP56305 User Manual

24-bit digital signal processor
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HOST INTERFACE (HI32)
DSP SIDE Programming Model
6.5.6.10

Target Retry (TRTY) Bit 10

The TRTY bit indicates that a PCI transaction, initiated by the HI32, was terminated with
a target initiated retry. When a PCI transaction initiated by the HI32 is terminated with
retry, TRTY is set and, if TTIE is set, a transaction termination interrupt request is
generated. TRTY is cleared when written one by the DSP56300 core.
Hardware and software resets clear TRTY.
6.5.6.11

PCI Time Out (TO) Bit 11

The TO bit indicates that a PCI transaction, initiated by the HI32, was terminated due to
the negation of the bus grant after the latency timer had expired. When a PCI transaction
initiated by the HI32 is terminated due to time-out, TO is set and, if TTIE is set, a
transaction termination interrupt request is generated. TO is cleared when written one
by the DSP56300 core.
Hardware and software resets clear TO.
6.5.6.12

Host Data Transfer Complete (HDTC) Bit 12

With the receive buffer lock enable (RBLE) bit in the DSP PCI control register (DPCR)
set: the HDTC bit indicates that the host-to-DSP data path is empty.
HDTC is set if SRRQ and MRRQ are cleared (i.e. the host-to-DSP data path is emptied by
DSP56300 core reads) after the termination or completion a non-exclusive PCI write
transaction to the HTXR, or the negation of HLOCK after the completion of an exclusive
write access to the HTXR, or after a read transaction initiated by the HI32. The HI32 will
disconnect (retry or disconnect-C) forthcoming write accesses to the HTXR as long as
HDTC is set.
HDTC is cleared when written one by the DSP56300 core. HDTC may be written one by
the DSP56300 core only if it is set.
If the HDTC bit is cleared the HI32 will respond to write PCI transactions according to
the status of the host-to-DSP data path.
Hardware, software and personal software resets clear HDTC.
Note:
Each of the bits APER, DPER, MAB, TAB, TDIS, TRTY, TO and HDTC are
cleared by writing one to the specific bit. In order to assure that only the
desired bit is cleared, the programmer should not use the BSET command. The
proper way to clear these bits is to write (MOVE(P) instruction) ones to the bits
to be cleared and zeros to all the others.
6-42
DSP56305 User's Manual
MOTOROLA

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