Motorola DSP56305 User Manual page 249

Table 6-18 Host Port Signals - Detailed Description (Sheet 9 of 13)
HI32
Port
PCI
a
Pin
HSTOP
Stop
Sustained tri-state bidirectional
c
signal.
Indicates the current target is
requesting the master to stop the
current transaction.
HI32 Mode
Enhanced Universal
HWR/HRW
Host Write/Read-Write
Schmitt trigger input signal.
When in the double-strobe mode of the HI32 (HDSM = 0),
this signal functions as host write input strobe (HWR). The
host processor initiates a write access by asserting HWR.
Data input is latched with the rising edge of HWR.
When in the single-strobe mode of the HI32 (HDSM = 1),
this signal functions as host read-write (HRW) input. It
selects the direction of data transfer for each host
processor access: from the HI32 to the host processor when
HRW is asserted and from the host processor to the HI32
when HRW is deasserted. The polarity of the HRW signal
is controlled by HRWP bit in the DCTR.
NOTE: The simultaneous assertion of HRD and HWR
is illegal.
b
Universal
GPIO
Disconnected