Port D Signals And Registers; Port E Signals And Registers; Triple Timer Signals - Motorola DSP56305 User Manual

General Purpose I/O
Programming Model
5.2.3

Port D Signals and Registers

Each of the six Port D signals not used as a ESSI1 signal can be configured individually
as a GPIO signal. The GPIO functionality of Port D is controlled by three registers: Port
D Control Register (PCRD), Port D Direction Register (PRRD) and Port D Data Register
(PDRD). These registers are described in Section 7 of this document.
5.2.4

Port E Signals and Registers

Each of the three Port E signals not used as a SCI signal can be configured individually
as a GPIO signal. The GPIO functionality of Port E is controlled by three registers: Port E
Control Register (PCRE), Port E Direction Register (PRRE) and Port E Data Register
(PDRE). These registers are described in Section 8 of this document.
5.2.5

Triple Timer Signals

Each of the three Triple Timer Interface signals (TIO0–TIO2) not used as a timer signal
can be configured individually as a GPIO signal. Each signal is controlled by the
appropriate Timer Control Status register (TCSR0–TCSR2). These registers are described
in Section 9 of this document.
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