Motorola DSP56305 User Manual page 584

Equates
M_BRF EQU $7F8000
M_BRP EQU 23
; Address Attribute Registers
M_BAT EQU $3
M_BAAP EQU 2
M_BPEN EQU 3
M_BXEN EQU 4
M_BYEN EQU 5
M_BAM EQU 6
M_BPAC EQU 7
M_BNC EQU $F00
M_BAC EQU $FFF000
; control and status bits in SR
M_CP EQU $c00000
M_CA EQU 0
M_V EQU 1
M_Z EQU 2
M_N EQU 3
M_U EQU 4
M_E EQU 5
M_L EQU 6
M_S EQU 7
M_I0 EQU 8
M_I1 EQU 9
M_S0 EQU 10
M_S1 EQU 11
M_SC EQU 13
M_DM EQU 14
M_LF EQU 15
M_FV EQU 16
M_SA EQU 17
M_CE EQU 19
M_SM EQU 20
M_RM EQU 21
M_CP0 EQU 22
M_CP1 EQU 23
; control and status bits in OMR
M_CDP EQU $300
M_MA EQU 0
M_MB EQU 1
M_MC EQU 2
M_MD EQU 3
M_EBD EQU 4
M_SD EQU 6
B-16
; Refresh Rate Bits Mask (BRF0-BRF7)
; Refresh prescaler
; External Access Type
;and Pin Definition Bits Mask (BAT0-BAT1)
; Address Attribute Pin Polarity
; Program Space Enable
; X Data Space Enable
; Y Data Space Enable
; Address Muxing
; Packing Enable
; No of Addr Bits to Compare Mask (BNC0-BNC3)
; Address to Compare Bits Mask (BAC0-BAC11)
; mask for CORE-DMA priority bits in SR
; Carry
; Overflow
; Zero
; Negative
; Unnormalized
; Extension
; Limit
; Scaling Bit
; Interupt Mask Bit 0
; Interupt Mask Bit 1
; Scaling Mode Bit 0
; Scaling Mode Bit 1
; Sixteen_Bit Compatibility
; Double Precision Multiply
; DO-Loop Flag
; DO-Forever Flag
; Sixteen-Bit Arithmetic
; Instruction Cache Enable
; Arithmetic Saturation
; Rounding Mode
; bit 0 of priority bits in SR
; bit 1 of priority bits in SR
; mask for CORE-DMA priority bits in OMR
; Operating Mode A
; Operating Mode B
; Operating Mode C
; Operating Mode D
; External Bus Disable bit in OMR
; Stop Delay
DSP56305 User's Manual MOTOROLA