Motorola DSP56305 User Manual page 84

24-bit digital signal processor
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Signal/Connection Descriptions
Host Interface (HI32)
Signal Name
Type
HFRAME
Input/
Output
HCLK
Input
2-26
Table 2-10 Host Interface (Continued)
State
During
Reset
Tri-stated
Host Frame—When the HI32 is programmed to
interface a PCI bus and the HI function is selected,
this is the Host cycle frame signal.
Non-PCI bus—When HI32 is programmed to
interface a universal non-PCI bus and the HI
function is selected, this signal must be connected
to a pull-up resistor or directly to V
Port B—When the HI32 is configured as GPIO
through the DCTR, this signal is internally
disconnected.
This input is 5 V tolerant.
Input
Host Clock—When the HI32 is programmed to
interface a PCI bus and the HI function is selected,
this is the Host Bus Clock input.
Non-PCI bus—When HI32 is programmed to
interface a universal non-PCI bus and the HI
function is selected, this signal must be connected
to a pull-up resistor or directly to V
Port B—When the HI32 is configured as GPIO
through the DCTR, this signal is internally
disconnected.
This input is 5 V tolerant.
DSP56305 User's Manual
Signal Description
CC
CC
MOTOROLA
.
.

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