Table 12-7 Fcop Interrupt Vectors And Dma; Interrupts And Dma; Operation Modes - Motorola DSP56305 User Manual

24-bit digital signal processor
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12.4.7

Interrupts and DMA

The FCOP interrupt vector table is listed in Table 12-7.
Interrupt
Address
*
VBA + Base
+ 0
Register Empty
*
Data Output
VBA + Base
+ 2
Register Full
Note:
The base address is found in intequ.asm, in Appendix A. It is $78.
12.5

OPERATION MODES

The FCOP operation modes are controlled by the FOM[0:1] bits in the FCSR as described
in Section 12.4.6.2. In each mode, the FDCM bit in FCSR selects between no decimation
or decimation by two. The following sections describe the operation of FCOP in each
mode, either with no decimation or with decimation by two. The description includes:
equation of the implemented filter, initialization and processing steps, data and
coefficients input scheme, output data scheme.
MOTOROLA

Table 12-7 FCOP Interrupt Vectors and DMA

Interrupt
Priority
Vector
Data Input
highest
lowest
DSP56305 User's Manual
Filter Co-Processor
Interrupt
Interrupt
Enable
Conditions
FDIIE
FDIBE = 1
FDOIE
FDOBF = 1
Operation Modes
DMA
Capability
Yes
Yes
12-14

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