Direct Memory Access (Dma); Dsp56305 Architecture Overview; General Purpose I/O (Gpio) Functionality - Motorola DSP56305 User Manual

24-bit digital signal processor
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1.9

DIRECT MEMORY ACCESS (DMA)

The Direct Memory Access (DMA) block has the following features:
• Six DMA channels supporting internal and external accesses
• One-, two-, and three-dimensional transfers (including circular buffering)
• End-of-block-transfer interrupts
• Triggering from interrupt lines and all peripherals
1.10

DSP56305 ARCHITECTURE OVERVIEW

The DSP56305 is designed to perform a wide variety of fixed-point digital signal
processing functions. In addition to the core features previously discussed, the
DSP56305 provides the following peripherals:
• Up to forty-two user-configurable General Purpose Input/Output (GPIO) signals
• 32-bit parallel Host Interface (HI32) to external hosts
• Dual Enhanced Synchronous Serial Interface (ESSI)
• Serial Communications Interface (SCI) with baud rate generator
• Timer/Event Counter Module (TEC)
• Memory Switch mode
• Four external interrupt/mode control lines
• Filter Co-Processor (FCOP)
• Viterbi Co-Processor (VCOP)
• Cyclic Code Co-Processor (CCOP)
1.10.1

General Purpose I/O (GPIO) Functionality

The General Purpose I/O (GPIO) port consists of as many as forty-two programmable
signals, all of which are also used by the peripherals (HI32, ESSI, SCI, and TTM). There
are no dedicated GPIO signals. The signals are configured GPIO after reset. The GPIO
functionality for each peripheral is controlled by three memory-mapped registers per
peripheral. The register programming techniques for GPIO functionality are very similar
for each of the interfaces.
MOTOROLA
DSP56305 User's Manual
DSP56305 Overview
Direct Memory Access (DMA)
1-15

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