Timer Modes Of Operation - Motorola DSP56305 User Manual

Timer/Event Counter

Timer Modes of Operation

9.4 TIMER MODES OF OPERATION
Each timer has various operational modes that meet a variety of system requirements.
These modes are:
• Timer
– GPIO, Mode 0: Internal timer interrupt generated by the internal clock (free
running counter)
– Pulse, Mode 1: External timer pulse generated by the internal clock
– Toggle, Mode 2: Output timing signal toggled by the internal clock
– Event Counter, Mode 3: Internal timer interrupt generated by an external
clock
• Measurement
– Input Width, Mode 4: Input pulse width measurement
– Input Pulse, Mode 5: Input signal period measurement
– Capture, Mode 6: Capture external signal
• PWM, Mode 7: Pulse Width Modulation
• Watchdog
– Pulse, Mode 9: Output pulse, internal clock
– Toggle, Mode 10: Output toggle, internal clock
These modes are described in detail below. To select a mode, first enable the timer by
setting the TE bit. Timer mode is selected by inputting correct values to the TC[3:0] bits
(TCSR Bits 4-7) as shown in Table 9-2. This table also shows the TIO signal direction and
the clock source for each timer mode.
Note: To ensure proper operation, the TC[3:0] bits should be changed only when the
timer is disabled (when the TE bit (TCSR Bit 0) is cleared).
To enable the timer, set the TE bit. If the TE bit is cleared, the TIO (timer) signal acts as a
GPIO signal.
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