Motorola DSP56305 User Manual page 247

Table 6-18 Host Port Signals - Detailed Description (Sheet 7 of 13)
HI32
Port
PCI
a
Pin
HREQ
Bus Request
Tri-state, Output signal.
Indicates to the arbiter that the HI32
desires use of the bus.
HREQ is deasserted in the same PCI
clock that the HI32 asserts HFRAME.
As during the STOP reset HREQ is
high impedance, an external pull-up
should be connected if it is connected
to the PCI bus arbiter.
HI32 Mode
Enhanced Universal
HTA
Host Transfer Acknowledge
Tri-state, Output signal.
Used for high speed data transfer between the HI32 and
an external host, when the host uses a non-interrupt
driven handshake mechanism. If the HI32 deasserts HTA
at the beginning of the host access, the host should extend
the access as long as HTA is deasserted. The polarity of the
HTA signal is controlled by HTAP in the DCTR.
The HTA signal is asserted if:
during a data read valid data is present on HD23-HD0
(HRRQ = 1 in the HSTR).
during a data write it indicates the HI32 is ready to accept
data (HTRQ = 1 in the HSTR).
during a vector write it indicates the HI32 is ready to
accept a new host command (HC = 0 in the HCVR).
b
Universal
GPIO
Disconnected