Motorola DSP56305 User Manual page 468

24-bit digital signal processor
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Filter Co-Processor
Operation Modes
For calculating the even outputs, the following equations are implemented:
(
)
FR n
=
even
(
)
FI n
even
Set Up
DSP
Initialization
Processing
12-38
N 4 ⁄ 1
(
( ) DR n 4i
HR 4i
i
=
0
N 4 ⁄ 1
(
( ) DI n
=
HR 4i
i
=
0
• Load Filter Count Register (FCNT) with (number of coefficient
values – 1)
• Choose operation mode (FOM[1:0], FDCM = 1, 1, 0) and enable
FCOP (FEN = 1)
• Core initializes coefficients in FCM in direct order by executing
#filter_count writes to FCIR.
• Core or DMA initializes data in FDM in direct order by executing
#filter_count writes to FDIR.
• Whenever FDIR is empty (FDIBE = 1), the FCOP triggers core or
the DMA to transfer two or four new data words (one or two
complex pairs) to the FDM via FDIR.
• Compute FR(n) and store result in FDOR.
• FCOP triggers core or DMA for output data transfer.
• Compute FI(n) and store result in FDOR.
• FCOP triggers core or DMA for output data transfer.
• Get new data word (DR).
• FCOP increments data memory pointer.
• Get new data word (DI).
• FCOP increments data memory pointer.
DSP56305 User's Manual
(
)
)
(
(
+
+
HI 4i
+
2
(
)
)
(
(
+
4i
HI 4i
+
2
) DI n 4i
(
)
)
+
+
2
) DR n
(
)
)
+
4i
+
2
MOTOROLA

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