Motorola DSP56305 User Manual page 246

Table 6-18 Host Port Signals - Detailed Description (Sheet 6 of 13)
HI32
Port
PCI
a
Pin
HPERR
Parity Error
Sustained tri-state bidirectional
c
signal.
Used for reporting of data parity
errors. HPERR must be driven active
(by the agent receiving data) two
clocks following the data (i.e. one
clock following the HPAR signal)
when a data parity error is detected.
HGNT
Bus Grant
Input signal.
Indicates to the HI32 that it has been
granted mastership of the bus.
If not used this signal should be
forced or pulled up to Vcc.
HI32 Mode
Enhanced Universal
HDRQ
DMA Request
Output Signal.
Used to support ISA/EISA-type DMA data transfers.
HDRQ is asserted by the HI32 when a DMA request
(receive and/or transmit) is generated in the HI32. HDRQ
is deasserted when the DMA request source is cleared
(HDAK is asserted), masked (by RREQ = 0 or TREQ = 0)
or disabled (DMAE = 0).
The polarity of HDRQ signal is controlled by HDRP bit in
the DCTR.
HAEN
Host Address Enable
Input signal.
Enables ISA/EISA DMA / I/O type accesses.
When high, the HI32 will respond to DMA cycles only (if
DMAE = 1 in the DCTR, if DMAE = 0 the HI32 will ignore
the access).
When low, the HI32 responds when it identifies its
address (i.e. ISA/EISA DMA / I/O type-space accesses).
b
Universal
GPIO
Disconnected
Disconnected