Interface - Host Side - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
HI32 Features
6.2.2

Interface - Host Side

• Mapping
– PCI Mode
• Memory Space — 16 K 32-bit wide locations
– 3 32-bit read/write registers (control, status, and host command)
– 16377 32-bit read/write locations corresponding to
one 32-bit input data FIFO
one 32-bit output data FIFO
– 4 32-bit reserved locations (read-only)
• Configuration Space — 64 32-bit locations
– Universal Bus Mode: 8 locations up to 24-bits wide
(of which 4 locations are reserved)
• Address Decoding
– PCI Mode — 32 bit internal address decoding
– Universal Bus Mode — 11 bit (12 with HAEN) internal address decoding
• Word Size — 8–, 16–, 24–, or 32–bits
• Data Buffers: FIFOs six or eight words deep, on transmit and receive data paths,
five deep in Universal Bus Mode (UBM)
• Data Fetch Types in HI32 (slave) to Host Data Transfers
– Fetch
– Pre-fetch
• Semaphores: flags supplied for HI32 allocation in a multi-host system
• Handshaking Protocols
– PCI Mode Handshaking Protocols
• Software Polled
• PCI Interrupt (HINTA signal)
• Data Acknowledge (HTRDY and HIRDY signals)
• Bus Arbitration (HREQ and HGNT signals)
6-6 DSP56305 User's Manual MOTOROLA