Dsp Pci Status Register (Dpsr) - Motorola DSP56305 User Manual

HOST INTERFACE (HI32)
DSP SIDE Programming Model
6.5.6

DSP PCI Status Register (DPSR)

23 22 21 20 19 18
RDC RDC RDC RDC
5 4 3 2
Reserved, read as zero
23,22,15-13,3 reserved
The DPSR is a 24-bit read-only status register used by the DSP56300 core to examine the
status and flags of the HI32, when in the PCI mode (HM=$1). The DPSR cannot be
accessed by the host processor. The DPSR bits are described in the following paragraphs.
6-38
17 16 15 14 13 12
RDC RDC HDTC TO TRTY TDIS TAB MAB DPER APER MARQ
1 0
Bit Name
0 MWS
1 MTRQ
2 MRRQ
4 MARQ
5 APER
6 DPER
7 MAB
8 TAB
9 TDIS
10 TRTY
11 TO
12 HDTC
21-16 RDC5-RDC0 Remaining Data Count
DSP56305 User's Manual
11 10 9 8 7
Function
PCI Master Wait States
PCI Master Transmit Data
Request
PCI Master Receive Data
Request
PCI Master Address Request
PCI Address Parity Error
PCI Data Parity Error
PCI Master Abort
PCI Target Abort
PCI Target Disconnect
PCI Target Retry
PCI Time Out Termination
PCI Host Data Transfer
Complete
6 5 4 3 2
MRRQ MTRQ MWS
MOTOROLA
1 0