No Decimation - Motorola DSP56305 User Manual

24-bit digital signal processor
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12.5.6.2
Mode 1 (Full Complex Correlation Filter), No Decimation
The following equations are implemented:
FR n ( )
FI n ( )
Set Up
DSP
Initialization
Processing
MOTOROLA
N 1
(
HR i ( ) DR n
=
i
=
0
N 1
(
HR i ( ) DI n
(
=
i
=
0
• Load Filter Count Register (FCNT) with (number of coefficient
values – 1)
• Choose operation mode (FOM[1:0], FDCM = 0, 1, 0) and enable
FCOP (FEN = 1)
• Core initializes coefficients in FCM in direct order, while
imaginary coefficients are first negated, by executing
#filter_count writes to FCIR
• Core or DMA initializes data in FDM in direct order by
executing #filter_count writes to FDIR
• Whenever FDIR is empty (FDIBE = 1), the FCOP triggers core
or the DMA to transfer two or four new data words (one or two
complex pairs) to the FDM via FDIR
• Compute FR(n) and store result in FDOR
• FCOP triggers core or DMA for output data transfer
• Compute FI(n) and store result in FDOR
• FCOP triggers core or DMA for output data transfer
• Get new data word (DR)
• FCOP increments data memory pointer
• Get new data word (DI)
• FCOP increments data memory pointer
DSP56305 User's Manual
(
)
)
(
HI i ( ) DI n
+
i
+
)
)
(
HI i ( ) DR n
(
+
i
Filter Co-Processor
Operation Modes
(
)
)
+
i
)
)
+
i
12-25

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