Port Data Register (Pdr); Figure 7-25 Port Data Register (Pdr) - Motorola DSP56305 User Manual

7.6.3

Port Data Register (PDR)

The read/write twenty-four-bit Port Data Register (PDR) is used to read or write data to
and from the ESSI GPIO signals. The PD[5:0] bits are used to read or write data from and
to the corresponding port signals if they are configured as GPIO signals. If a port signal
[i] is configured as a GPIO input, then the corresponding PD[i] bit reflects the value
present on this signal. If a port signal [i] is configured as a GPIO output, then the value
written into the corresponding PD[i] bit is reflected on the this signal.
7 6
PD5
STDn
13
15 14
21
23 22
Reserved Bit, Read As Zero, Should Be Written With Zero For Future Compatibility
Note: Either a hardware reset signal or a software reset instruction clear all PDR bits.
MOTOROLA
5 4 3 2
PD4 PD3 PD2
SRDn SCKn SCKn2 SCKn1 SCKn0
12 11 10
20 19 18

Figure 7-25 Port Data Register (PDR)

DSP56305 User's Manual
Enhanced Synchronous Serial Interface (ESSI)
GPIO/ESSI Selection and GPIO Usage
1 0
PD1 PD0
PDRC: ESSI0, X:$FFFFBD
PDRD: ESSI1, X:#FFFFAD
9 8
17 16
AA0690
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