Dsp56305 Features - Motorola DSP56305 User Manual

24-bit digital signal processor
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DSP56305 Overview

DSP56305 Features

• Code examples are displayed in a monospaced font, as shown in Example 1-1.
BFSET
• Hex values are indicated with a dollar sign ($) preceding the hex value, as
follows: $FFFFFF is the X memory address for the Core Interrupt Priority Register
(IPR-C).
• The word 'reset' is used in four different contexts in this manual:
– the reset signal, written as RESET,
– the reset instruction, written as RESET,
– the reset operating state, written as Reset, and
– the reset function, written as reset.
1.4
DSP56305 FEATURES
The DSP56305 is a member of the DSP56300 family of programmable CMOS DSPs. The
DSP56305 uses the DSP56300 core, a high performance, single clock cycle per instruction
engine. It provides up to twice the performance of Motorola's popular DSP56000 core
family, while retaining code compatibility with that family.
The DSP56300 core family's rich instruction set and low power dissipation offer a new
level of performance in speed and power, enabling a new generation of wireless,
telecommunications, and multimedia products. The DSP56300 core is composed of the
Data Arithmetic Logic Unit (Data ALU), Address Generation Unit (AGU), Program
Control Unit (PCU), Instruction Cache Controller, Bus Interface Unit, Direct Memory
Access (DMA) controller, On-Chip Emulation (OnCE) module, and a Phase Lock Loop
(PLL)-based clock oscillator. Significant architectural enhancements to the DSP56300
core family include a barrel shifter, 24-bit addressing, an instruction cache, and DMA.
The DSP56300 core family members contain the DSP56300 core and additional modules.
The modules are chosen from a library of standard pre-designed elements, such as
memories and peripherals. New modules may be added to the library to meet customer
specifications. A standard interface between the DSP56300 core and the on-chip memory
and peripherals supports a wide variety of memory and peripheral configurations.
The DSP56305 may be used in GSM base stations and general digital signal processing.
1-6
Example 1-1 Sample Code Listing
#$0007,X:PCC; Configure:
;
MISO0, MOSI0, SCK0 for SPI master
; ~SS0 as PC3 for GPIO
DSP56305 User's Manual
line 1
line 2
line 3
MOTOROLA

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