Memory Breakpoint Control Table - Motorola DSP56000 Manual

24-bit digital signal processor
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OnCE CONTROLLER AND SERIAL INTERFACE
When BC3-BC0=0011, program memory breakpoints are enabled for any read or write
access to the Program space (any kind of MOVE, true and false fetches, fetches of sec-
ond word, etc.).
When BC3-BC0=0100, program memory breakpoints are enabled only for fetches of the
first instruction word of instructions that are actually executed. Aborted instructions and
prefetched instructions that are discarded (such as jump targets that are not taken) are
ignored by the breakpoint logic.
When BC3-BC0=0101, 0110 or 0111, program memory breakpoints are enabled only for
explicit program memory access resulting from MOVEP or MOVEM instructions to/from
P: memory space.
Table 10-3 Memory Breakpoint Control Table
BC3
BC2
BC1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
0
1
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
10.3.4.2
Trace Mode Enable (TME) Bit 4
The TME control bit, when set, enables the Trace Mode of operation (see Section 10.5).
This bit is cleared on hardware reset.
10.3.4.3
Reserved (Bits 5-7, 11-15)
These bits are reserved for future use. They read as zero and should be written with zero
for future compatibility.
MOTOROLA
BC0
0
0
Breakpoint disabled
0
1
Breakpoint on any fetch (including aborted instructions)
1
0
Breakpoint on any P read (any fetch or move)
1
1
Breakpoint on any P access (any fetch, P move R/W)
0
0
Breakpoint on executed fetches only
0
1
Breakpoint on P space write
1
0
Breakpoint on P space read (no fetches)
1
1
Breakpoint on P space write or read (no fetches)
0
0
Reserved
0
1
Breakpoint on X space write
1
0
Breakpoint on X space read
1
1
Breakpoint on X space write or read
0
0
Reserved
0
1
Breakpoint on Y space write
1
0
Breakpoint on Y space read
1
1
Breakpoint on Y space write or read
ON-CHIP EMULATION (OnCE)
DESCRIPTION
10 - 11

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