Switched Program Ram And Instruction Cache Enabled (0, 1, 1) - Motorola DSP56303 User Manual

Memory Maps
Program
$FFFFFF
Internal
Reserved
$FFF0C0
Bootstrap ROM
$FF0000
External
$000400
Internal
Program
RAM 1 K
$000000
Bit Settings
SC MS CE
0 1 1
Figure 3-4. Switched Program RAM and Instruction Cache Enabled (0, 1, 1)
3-10
$FFFFFF
Internal I/O
$FFFF80
$FFF000
Reserved
$FF0000
$000C00
X data RAM
$000000
Program RAM X Data RAM
1 K 3 K
$000–$3FF $000–$BFF
DSP56303 User's Manual
X Data
$FFFFFF
$FFFF80
External
$FFF000
Internal
$FF0000
External
$000C00
Internal
3 K
$000000
Memory Configuration
Y Data RAM
3 K
$000–$BFF
Y Data
External I/O
External
Internal
Reserved
External
Internal
Y data RAM
3 K
Addressable
Cache
Memory Size
1 K 16 M
internal not
accessible