Notes On Memory Programming; Power-Down States For Flash Memory - Renesas H8/38024 Hardware Manual

6.10.9

Notes on Memory Programming

1. When performing programming using programmer mode on a chip that has been
programmed/erased in an on-board programming mode, auto-erasing is recommended before
carrying out auto-programming.
2. The flash memory is initially in the erased state when the device is shipped by Renesas
Technology. For other chips for which the erasure history is unknown, it is recommended that
auto-erasing be executed to check and supplement the initialization (erase) level.
6.11

Power-Down States for Flash Memory

In user mode, the flash memory will operate in either of the following states:
• Normal operating mode
The flash memory can be read and written to at high speed.
• Power-down operating mode
The power supply circuit of the flash memory is partly halted and can be read under low power
consumption.
• Standby mode
All flash memory circuits are halted.
Table 6.23 shows the correspondence between the operating modes of this LSI and the flash
memory. In subactive mode, the flash memory can be set to operate in power-down mode with the
PDWND bit in FLPWCR. When the flash memory returns to its normal operating state from
power-down mode or standby mode, a period to stabilize the power supply circuits that were
stopped is needed. When the flash memory returns to its normal operating state, bits STS2 to STS0
in SYSCR1 must be set to provide a wait time of at least 20 µs, even when the external clock is
being used.
Table 6.23 Flash Memory Operating States
LSI Operating State
Active mode
Subactive mode
Sleep mode
Subsleep mode
Standby mode
Watch mode
Rev. 6.00, 08/04, page 184 of 628
Flash Memory Operating State
PDWND = 0 (Initial value)
Normal operating mode
Power-down mode
Normal operating mode
Standby mode
Standby mode
Standby mode
PDWND = 1
Normal operating mode
Normal operating mode
Normal operating mode
Standby mode
Standby mode
Standby mode