Subactive Mode; Transition To Subactive Mode; Clearing Subactive Mode; Operating Frequency In Subactive Mode - Renesas H8 Series Hardware Manual

5.6

Subactive Mode

5.6.1

Transition to Subactive Mode

Subactive mode is entered from watch mode if a timer A, timer F, timer G, IRQ
WKP interrupt is requested while the LSON bit in SYSCR1 is set to 1. From subsleep mode,
0
subactive mode is entered if a timer A, timer C, timer F, timer G, asynchronous event counter,
SCI3, IRQAEC, IRQ
4
to subactive mode does not take place if the I bit of CCR is set to 1 or the particular interrupt is
disabled in the interrupt enable register.
5.6.2

Clearing Subactive Mode

Subactive mode is cleared by a SLEEP instruction or by a low input at the
• Clearing by SLEEP instruction
If a SLEEP instruction is executed while the SSBY bit in SYSCR1 is set to 1 and TMA3 bit in
TMA is set to 1, subactive mode is cleared and watch mode is entered. If a SLEEP instruction
is executed while SSBY = 0 and LSON = 1 in SYSCR1 and TMA3 = 1 in TMA, subsleep
mode is entered. Direct transfer to active mode is also possible; see section 5.8, Direct
Transfer, below.
• Clearing by
pin
R E S
Clearing by pin is the same as for standby mode; see Clearing by
R E S
5.3.2, Clearing Standby Mode.
5.6.3

Operating Frequency in Subactive Mode

The operating frequency in subactive mode is set in bits SA1 and SA0 in SYSCR2. The choices
are φ /2, φ /4, and φ
W W W
, IRQ , IRQ , IRQ , or WKP
3 1 0
/8.
Section 5 Power-Down Modes
to WKP interrupt is requested. A transition
7 0
Rev. 7.00 Mar 10, 2005 page 135 of 652
, or WKP to
0 7
pin.
R E S
pin in section
R E S
REJ09B0042-0700