Enabling And Disabling Exceptions - IBM PowerPC 604 User Manual

Table 4-3. MSR Bit Settings (Continued)
Blt(s)
Name Description
30 RI Indicates whether system reset or machine check exception is recoverable.
0
Exception is not recoverable.
1 Exception is recoverable.
The RI
bit
Indicates whether from the perspective ol the processor, ft is safe to continue (that is,
processor state data such as that saved to SARO is valid), but it does not guarantee that the
interrupted process is recoverable.
31
LE
Little-endian mode enable
0 The processor runs in big-andian mode.
1 The processor runs in llttle-endian mode.
The IEEE floating-point exception mode bits (FEO and FEl) together define whether
floating-point exceptions are handled precisely, imprecisely, or whether they are taken at
all. The possible settings and default conditions for the 604 are shown in Table 4-4. For
further details, see Chapter 6, "Exceptions," of
The Programming Environments Manual.
Table 4-4. IEEE Floating-Point Exception Mode Bits
FED FE1 Mode
0 0
Floating-point exceptions disabled
0
1 Floating-point imprecise nonrecoverable
1
0
Floatlng-point Imprecise recoverable. In the 604, this bit setting causes the 604 to operate in floating-
point precise mode.
1 1 Floating-point precise mode
MSR bits are guaranteed to be written
to
SRRl when the first instruction of the exception
handler is encountered.
4.3.1 Enabling and Disabling Exceptions
When a condition exists that may cause an exception to be generated, it must be detennined
whether the exception is enabled for that condition.
• IEEE floating-point enabled exceptions (a type of program exception) are ignored
when both MSR[FEO] and MSR[FEl] are cleared If either of these bits are set, all
IEEE enabled floating-point exceptions are taken and cause a program exception.
• Asynchronous, maskable exceptions (that is, the external and decrementer
interrupts) are enabled by setting the MSR[EE]
bit
When MSR[EE]
=
0, recognition
of these exception conditions is delayed MSR[EE] is cleared automatically when an
exception is taken,
to
delay recognition of conditions causing those exceptions.
Chapter 4. Exceptions
4-9
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