IBM PowerPC 604 User Manual page 166

Table 3-6. Cache Actions (Continued)
Cache
MESI
Action
Bus
Bus
TT0-4 Rsv'n
Snoop
Action
WIM
State
Operation
WIM Response
(n/a) Snoop-
xx1 11000
(n/a)
(None) but
Do
not perform the TLB
TLB ARTR'Y'is invatidate--this is to prevent a
invalidate
activated on deadlock condition from
the bus from occurring.
another
processor
(n/a) Snoop- xx1 11000 (n/a)
ARTRY
Respond with
retry
until the TLB
TLB has been invalidated.
invalidate
(n/a) Snoop- xx1 01000 (n/a) (None) H no TLB invalidates are
SYNC
pending, no-op.
(n/a) Snoop- xx1 01000 (n/a)
J(FITRV
H a TLB invalidate Is pending,
SYNC
respond with retry.
(n/a)
Snoop- xx1
01001 (n/a) (None)
H no TLB invalidates are
TLBSYNC pending, no-op.
(n/a) Snoop- xx1 01001 (n/a)
J(FITRV
H a TLB invalidate is pending,
TLBSYNC
respond with retry.
(n/a) Snoop-
xx1
10000 (n/a) (None) No-op
EIEIO
(n/a) Snoop- xx1 10000 (n/a)
J(FITRV
No-op
EIEIO
I Snoop- xx1 01101 (n/a) (None) No-op
ICBI
VAL
Snoop-
xx1 01101 (n/a) (None) Invalidate entry in lcache
ICBI
I Snoop- xx1 01011 None (None) No-op
RWNITC
I Snoop- xx1 01011 Yes
~
No-op
RWNITC
ES Snoop- xx1 01011 (n/a)
~
No-op
RWNITC
M Snoop- xx1 01011 (n/a)
J(FITRV&~
Attempt to write cache block
RWNITC back to main memory;
if
successful, mark cache block E.
Chapter 3. Cache and Bus Interface Unit Operation
3-43