Glossary Of Terms And Abbreviations - IBM PowerPC 604 User Manual

Glossary of Terms and Abbreviations
The glossary contains an alphabetical list of terms, phrases, and abbreviations used in this
book. Some of the terms and definitions included in the glossary are reprinted from
IEEE
Std 754-1985, IEEE Standard for Binary Floating-Point Arithmetic,
copyright ©1985 by
the Institute of Electrical and Electronics Engineers, Inc. with the permission of the IEEE.
A
Atomic. A bus access that attempts to be part of a read-write operation to the
same address uninterrupted by any other access to that address (the
term refers to the fact that the transactions are indivisible). The
PowerPC architecture implements atomic accesses through the
lwarx/stwcx. instruction pair.
B
Biased exponent. The sum of the exponent and a constant (bias) chosen to
make the biased exponent's range non-negative.
Big-endian. A byte-ordering method in memory where the address n of a
word corresponds to the most significant byte. In an addressed
memory word, the bytes are ordered (left to right) 0, l, 2, 3, with 0
being the most significant byte.
Boundedly undefined. The results of attempting to execute a given
instruction are said to be
boundedly undefined
if they could have
been achieved by executing an arbitrary sequence of defined
instructions, in valid form, starting in the state the machine was in
before attempting to execute the given instruction. Boundedly
undefined results for a given instruction may vary between
implementations, and between execution attempts in the same
implementation.
C
Cache. High-speed memory contallllilg recently accessed data and/or
instructions (subset of main memory).
Cache block. The cacheable unit for a PowerPC processor. The size of a -
cache block may vary among processors.
Glossary of Terms and Abbreviations
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