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Memory consistency. Refers to agreement of levels of memory with respect
to a single processor and system memory (e.g. on-chip cache,
secondary cache, and system memory).
Memory management unit. The functional unit that translates the effective
address bits to physical address bits.
N
NaN.
An
abbreviation for Not a number; a symbolic entity encoded in
floating-point format. There are two types of NaNs-signaling NaNs
and quiet NaNs.
No-op. No-operation. A single-cycle operation that does not affect registers
or generate bus activity.
0
Overflow.
An
error condition that occurs during arithmetic operations when
the result cannot be stored accurately in the destination register(s).
For example, if two 32-bit numbers are added, the sum may require
33 bits due
to
carry.
p
Page. A 4-Kbyte area of memory, aligned on a 4-Kbyte boundary.
Q
s
Glossary-4
Pipelining. A technique that breaks instruction execution into distinct steps
so that multiple steps can be performed at the same time.
Precise exceptions. The pipeline can be stopped so the instructions that
preceded the faulting instruction can complete, and subsequent
instructions can be executed from scratch. The system is precise
unless one of the imprecise modes for invoking the floating-point
enabled exception is in effect.
Quiet NaNs. Propagate through almost every arithmetic operation without
signaling exceptions. These are used to represent the results of
certain invalid operations, such as invalid arithmetic operations on
infinities or on NaNs, when invalid.
Signaling NaNs. Signal the invalid operation exception when they are
specified as arithmetic operands
Significand. The component of a binary floating-point number that consists
of an explicit or implicit leading bit to the left of its implied binary
point and a fraction field to the right.
PowerPC 604 RISC Microprocessor User's Manual
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