Floating-Point Compare Instructions; Floating-Point Status And Control Register Instructions - IBM PowerPC 604 User Manual

-
Examples of uses of these instructions
to
perform various conversions can
be
found in
Appendix D, "Floating-Point Models," in The Programming Environments Manual.
Table 2·16. Floating-Point Rounding and Conversion Instructions
Name Mnemonic Operand Syntax
Floating Round to Single frap (lrsp.) lrD,frB
Floating Convert to Integer Word
fctlw (lctlw.) lrD,frB
Floating Convert to Integer Word with Round toward Zero fetlwz (fctlwz.) frD,frB
2.3.4.2.4 Floating-Point Compare Instructions
Floating-point compare instructions compare the contents of two floating-point registers.
The comparison ignores the sign of zero (that is
+O
=
-0). The floating-point compare
instructions are summarized in Table 2-17.
Table 2·17. Floatlng-Polnt Compare Instructions
Name
Mnemonic
Operand Syntax
Floating Compare Unordered tcmpu crlD,lrA,frB
Floating Compare Ordered
tempo
crfD,lrA,frB
Within
the PowerPC architecture, an fcmpu or fcmpo instruction with the Re bit set can
cause an illegal instruction program exception or produce a boundedly undefined result. In
the 604, crfD should
be
treated as undefined.
2.3.4.2.5 Floating-Point Status and Control Register Instructions
Every FPSCR instruction appears
to
synchronize the effects of all floating-point
instructions executed by a given processor. Executing an FPSCR instruction ensures that
all floating-point instructions previously initiated by the given processor appear
to
have
completed before the FPSCR instruction is initiated and that no subsequent floating-point
instructions appear
to
be initiated by the given processor until the FPSCR instruction has
completed
The
FPSCR instructions are summarized in Table 2-18.
Table 2·18. Floating-Point Status and Control Register Instructions
Name
Mnemonic Operand Syntax
Move from FPSCR mffs (mlls.) lrD
Move
to Condition Register from FPSCR mcrls crlD,crlS
Move
to FPSCR Field Immediate mtfsfl (mtfsfl.)
crlD,IMM
Move to FPSCR Fields
mtfsf (mtfsf.) FM,frB
Move to FPSCR Bit 0 mtfsbO (mtlsbO.)
crbD
Move to FPSCR
Bil
1 mtfsb1 (mtlsb1.) crbD
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PowerPC 604 RISC Microproceseor User's Manual