Effective Address Calculation; Synchronization; Context Synchronization - IBM PowerPC 604 User Manual

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The operand of a single-register memory access instruction has a natural alignment
boundary equal to the operand length. In other words, the "natural" address of an operand
is an integral multiple of the operand length. A memory operand is said to be aligned
if
it
is aligned at its natural boundary; otherwise it is misaligned. For a detailed discussion about
memory operands, see Chapter 3, "Operand Conventions," of The Programming
Environments Manual.
2.3.2.3 Effective Address Calculation
An effective address (EA) is the 32-bit sum computed by the processor when executing a
memory access or branch instruction or when fetching the next sequential instruction. For
a memory access instruction, if the sum of the effective address and the operand length
exceeds the maximum effective address, the memory operand is considered to wrap around
from the maximum effective address through effective address 0, as described in the
following paragraphs.
Effective address computations for both data and instruction accesses use 32-bit unsigned
binary arithmetic. A carry from bit 0 is ignored.
Load and store operations have
three
categories of effective address generation:
• Register indirect with immediate index mode
• Register indirect with index mode
• Register indirect mode
Refer to Section 2.3.4.3.2, "Integer Load
and
Store Address Generation,'' for a detailed
description of effective address generation for load and store operations.
Branch instructions have three categories of effective address generation:
• Immediate
• Link register indirect
• Count register indirect
2.3.2.4 Synchronization
The synchronization described in this section refers to the state of the processor that is
performing the synchronization.
2.3.2.4.1 Context Synchronization
The System Call (sc) and Return from Interrupt
(rfi)
instructions perform context
synchronization by allowing previously issued instructions to complete before performing
a change in context. Execution of one of these instructions ensures the following:
• No higher priority exception exists (sc).
• All previous instructions have completed to a point where they can no longer cause
an exception.
If
a prior memory access instruction causes direct-store error
exceptions, the results are guaranteed to be determined before this instruction is
executed.
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PowerPC 604 RISC Microprocassor User's Manual