Related Manuals for IBM POWERPC 970MP
Summary of Contents for IBM POWERPC 970MP
- Page 1 ® ® IBM PowerPC 970MP RISC Microprocessor Application Note ® PowerPC 970MP Differences (Includes Differences for 970FX to 970MP) Version: 1.0 Preliminary November 15, 2006...
- Page 2 NOT intended for use in implantation or other life support, space, nuclear, or military applications where malfunction may result in injury or death to persons. The information contained in this document does not affect or change IBM product specifications or warranties. Nothing in this document shall operate as an express or implied license or indemnity under the intellectual property rights of IBM or third parties.
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Page 3: Table Of Contents
2. Overview ... 9 3. Processor Version Register (PVR) ... 9 4. General Parameters ... 10 5. Design Enhancements for PowerPC 970MP ... 10 5.1 Dual Core Design ... 10 5.1.1 1MB L2 Cache per Core ... 12 5.2 Processor Interconnect Bus ... 13 5.2.1 SCOM control and status registers ... - Page 4 Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary AppNote_970FX-MP_Differences_TOC.fm.1.0 Page 4 of 25 November 15, 2006...
- Page 5 970MP Power Modes ... 17 Figure 8-1. PowerPC 970MP Mechanical Package (Side and Top View) ... 23 Figure 8-2. PowerPC 970MP Bottom Surface of CBGA Package (Bottom View) ... 24 AppNote_970FX-MP_Differences_LOF.fm.1.0 November 15, 2006 Application Note (Includes Differences for 970FX to 970MP) ®...
- Page 6 Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary AppNote_970FX-MP_Differences_LOF.fm.1.0 Page 6 of 25 November 15, 2006...
- Page 7 PowerPC 970MP Programmable Delay Parameters ... 16 Table 5-2. Power Mode States ... 18 Table 5-3. PowerPC 970MP Latency of Deep Nap to Run Transition (Full Frequency Cycles) ... 19 Table 8-1. PowerPC 970FX, and 970MP Die Size and Dimensions ... 20 Table 8-2.
- Page 8 Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Preliminary AppNote_970FX-MP_Differences_LOT.fm.1.0 Page 8 of 25 November 15, 2006...
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Page 9: Abstract
This preliminary application note describes the differences between the PowerPC and PowerPC 970MP microprocessor. The primary objective of the PowerPC 970FX remap to the 970MP is to achieve a high frequency dual core processor. The design changes include a 1MB L2 cache per core, support for higher bus speeds, power management improvements, and errata fixes. -
Page 10: General Parameters
IBM PowerPC 970MP RISC Microprocessor Datasheet when the two processors are running. Also, the core frequencies will always be the same. This would be true for two separate cores except for the Deep Nap case, where one of two separate processors could reduce frequency to 1/64, while the other ran at functional speed. - Page 11 30, and it is expected that the bridge chip will need to similarly be designed for a higher maximum value than was previously used. Refer to the IBM PowerPC 970MP Design Guidelines for more information. Intercommunication between the processors on chip occurs in the same way as if they were on separate chips, via the bridge chip.
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Page 12: 1Mb L2 Cache Per Core
970MP, due to the longer path from the core to the larger L2 array. This load-use penalty for fixed-point unit operands that hit in the 1 MB L2 cache is 14 processor cycles. 5. Design Enhancements for PowerPC 970MP AppNote_970FX-MP_Differences_Body.fm.1.0... -
Page 13: Processor Interconnect Bus
Three of these are mode registers and two are status registers. See the IBM PowerPC 970FX RISC Microprocessor User’s Manual for a description of these registers. The 970MP replaces these five SCOM registers with a set of sixteen new SCOM registers (located in the common domain at address x’08.XXXX’). -
Page 14: Receiver Electrical Shorts Test (Rest)
16 bits of data on the channel under test. The checking procedure within the receiver expects the channel under test to increment from channel 0 through channel 47. 5. Design Enhancements for PowerPC 970MP Page 14 of 25 Preliminary AppNote_970FX-MP_Differences_Body.fm.1.0... -
Page 15: Receiver Random Data Self Test
The programmable delay parameters described in AppNote_970FX-MP_Differences_Body.fm.1.0 November 15, 2006 Application Note (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor 5. Design Enhancements for PowerPC 970MP Page 15 of 25... - Page 16 Section 11.4 of the 970FX User’s Manual are set to system dependent values during initialization, and must account for these larger latencies in the 970MP. The range of values that may be specified for each of these parameters for the 970MP is: Table 5-1. PowerPC 970MP Programmable Delay Parameters Parameter COMPACE...
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Page 17: Powertuning
AppNote_970FX-MP_Differences_Body.fm.1.0 November 15, 2006 IBM PowerPC Doze L2/R2 L1/R1 L7/R7 L9/R9 L8/R8 L14/R14 L16/R16 L15/R15 Application Note (Includes Differences for 970FX to 970MP) ® 970MP RISC Microprocessor Deep 5. Design Enhancements for PowerPC 970MP Page 17 of 25... -
Page 18: Time Base And Decrementer
In DD3.0 of the 970FX, a clock dithering mechanism was added in the power tuning hardware, to gradually transition between frequencies. The 970MP replaces the 970FX 24-bit dither with a selectable 24- or 48-bit dither pattern. 5. Design Enhancements for PowerPC 970MP Page 18 of 25 Preliminary AppNote_970FX-MP_Differences_Body.fm.1.0... -
Page 19: Programmable Delays For Power Saving Mode Transitions
0 to 63. This delay occurs 6 times during the Deep Nap to Run transition. Table 5-3 lists the latency of Deep Nap to Run Transition for the PowerPC 970MP for full, half, and quarter frequency scaling. -
Page 20: Timings
If the liquid in the pipe boils, the cooling system will fail. The PowerPC 970MP is on the cusp of air versus water for a cooling solution. -
Page 21: Capacitor Position
However, there are a number of pins that are duplicated, one per core, several new or modi- fied pins, and a few deletions. Table 8-2 lists the duplicated 970FX pins, one per core on the PowerPC 970MP. Table 8-3 lists the new PowerPC 970MP pins. Table 8-4 lists 970FX pins not found on PowerPC 970MP. -
Page 22: Powerpc 970Mp Microprocessor Package Dimensions
Figure 8-1 shows the side and top views of the Pb-reduced package including the height from the top of the die to the bottom of the solder balls. Figure 8-2 shows a bottom view of the PowerPC 970MP package. 8. Package AppNote_970FX-MP_Differences_Body.fm.1.0... - Page 23 Where not otherwise defined, centerlines indicated are to be interpreted as a datum frame work, established by DATUMS D, A, and B respectively. This line defines the approximate boundary configuration of encapsulant as dispensed. For underfill requirements see IBM Engineering Specification 71X8781 Module Encapsulation Specification.
- Page 24 Where not otherwise defined, centerlines indicated are to be interpreted as a datum frame work, established by DATUM D, A, and B, respectively. This line defines the approximate boundary configuration of encapsulant as dispensed. For underfill requirements see IBM Engineering Specification 71X8781 Module Encapsulation Specification.
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Page 25: Revision Log
Preliminary Revision Log Revision Version 1.0 November 15, 2006 Initial preliminary version. Rev_Log.fm.1.0 November 15, 2006 (Includes Differences for 970FX to 970MP) ® IBM PowerPC 970MP RISC Microprocessor Modification Application Note Revision Log Page 25 of 25...