IBM PowerPC 604 User Manual page 30

Table I. Acronyms and Abbreviated Terms (Continued)
Term Meaning
PTEG Page table entry group
PVR Processor version register
RISC
Reduced instruction set computing/computer
ROB Reorder buffer
RTL Register transfer language
RWITM Read with intent to modify
SCIU Single-cycle integer unit
SDA Sampled data address (register)
SDR1
Register that specifies the page table base address for virtual-to-physical address translation
SIA Sampled instruction address (register)
SIMM
Signed immediate value
SLB Segment look-aside buffer
SPR Special-purpose register
SPRGn
Registers available for general purposes
SR Segment register
SARO (Machine status) save/restore register 0
SRR1 (Machine status) save/restore register 1
TB
Time base register
TLB Translation lookaside buffer
UIMM Unsigned immediate value
UISA User instruction set architecture
VEA
Virtual environment architecture
XATC Extended address transfer code
XER
Register used for indicating condftions such as carries and overflows for integer aperations
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