Transfer Size {Tsizo-Tsiz2)-0Utput; Transfer Size - IBM PowerPC 604 User Manual

7 .2.4.2.1 Transfer Size {TSIZO-TSIZ2)-0utput
Following are the state meaning and timing comments for the TSIZO-TSIZ2 output signals
on the 604.
State Meaning
Asserted/Negated-For memory accesses, these signals along with
TBST, indicate the data transfer size for the current bus operation, as
shown in Table 7-2. Table 8-4 shows how the TSIZ signals are used
with the address signals for aligned transfers. Table 8-5 shows how
the TSIZ signals are used with the address signals for misaligned
transfers. For 1/0 transfer protocol, these signals form part of the 1/0
transfer code; see the description in Section 7 .2.4.1, "Transfer Type
(TTO-TT4)."
For external control instructions (eciwx and ecowx), TSIZO-TSIZ2
are used to output bits 29-31 of the external access register (EAR),
which are used to form the resource ID (TBSTllTSIZO-TSIZ2).
Timing Comments Assertion/Negation-The same as AO-A31.
High Impedance-The same as AO-A31.
Table 7-2. Data Transfer Size
TBT
TSIZO-TSIZ2 Transfer Size
Asserted 010 Burst (32 bytes)
Negated 000 Sbytes
Negated
001
1 byte
Negated
010
2 bytes
Negated
011
3 bytes
Negated 100 4bytes
, Negated
101 5 bytes
Negated
110
6bytes
Negated 111 7bytes
7.2.4.2.2 Transfer Size {TSIZO-TSIZ2)-lnput
Following are the state meaning and timing comments for the TSIZO-TSIZ2 input signals
on the 604.
State Meaning Asserted/Negated- For the direct-store protocol, these signals form
part of the 1/0 transfer code; see Section 7 .2.4.1, "Transfer Type
(TTO-TT4)."
Timing Comments Assertion/Negation-The same as AO-A3 l.
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PowerPC 604 RISC Microprocessor User's Manual