Alignment Of External Control Instructions - IBM PowerPC 604 User Manual

Table 8-5. Mlsallgned Data Transfers (Four-Byte Examples)
Transfer Size
Data Bus Byte Lanes
(Four Bytes)
TSIZ(0-2)
A29-A31
0 1
2
3 4
5 6
1
Aftgned
100 000
A A A
A
- - - -
Misaligned-first access
011 001
A
A A
- - - -
second
access
001
100
- - - -
A
- -
-
Misaligned-first access 010
010
- -
A A
- - - -
second access
010 100
A A
- - - - - -
Misaligned-first access 001
011
- - -
A
-
-
-
-
second access
011
100
- - - -
A A A
-
Aftgned
100 100 A
A
A A
-
-
- -
Misaligned-first
access 011 101
-
- -
-
-
A
A A
second
access
001 000
A
- - -
-
- -
-
Misaligned-first access 010 11 0
- - - - - -
A A
second access
010 000
A A
- - - - -
-
Misaligned-first
access 001
111
- -
- - -
-
-
A
second
access
011 000 A
A A
- - - - -
A:
Byte lane used
-. Byte lane not used
8.3.2.4.1 Alignment of External Control Instructions
The size of the data transfer associated with the eciwx and ecowx instructions is always
four bytes. However, if the eciwx or ecowx instruction is misaligned and crosses any word
boundary, the 604 will generate two bus operations, each with a size of fewer than four
bytes. For the first bus operation, bits A29-A31 equals bits 29-31 of the data, which will
be OblOl, ObllO, or Oblll. The size associated with the first bus operation will be 3, 2, or
1 bytes, respectively. For the second bus operation, bits A29-A3 l equal ObOOO, and the size
associated with the operation will be l, 2, or 3 bytes, respectively. For both operations,
TBST and TSIZO-TSIZ2 are redefined
to
specify the resource ID (RID). The resource ID
is copied from bits 28-31 of the external access register (EAR). For eciwx/ecowx
operations, the state of bit 28 of the EAR is presented by the TBST signal without inversion
(if EAR[28]
=
1, TBST
=
1). The size of the second bus operation cannot be deduced from
the operation itself; the system must determine how many bytes were transferred on the first
bus operation
to
determine the size of the second operation.
Furthermore, the two bus operations associated with such a misaligned external control
instruction are not atomic. That is, the 604 may initiate other types of memory operations
8-16
PowerPC 604 RISC Microprocessor User's Manual