IBM PowerPC 604 User Manual page 13

Risc
Table of Contents

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Paragraph
Number
CONTENTS
Title
Page
Number
6.5
Execution Unit Timings ..................................................................................... 6-35
6.5.1
Branch Unit Instruction Timings ................................................................... 6-35
6.5.2
Integer Unit Instruction Timings ................................................................... 6-35
6.5.3
Floating-Point Unit Instruction Timings ........................................................ 6-37
6.5.4
Load/Store Unit Instruction Timings ............................................................. 6-39
6.5.5
isync, rfi, and sc Instruction Timings ............................................................ 6-41
6.6
Instruction Scheduling Guidelines ..................................................................... 6-42
6.6.1
Instruction Dispatch Rules ............................................................................. 6-42
6.6.2
6.7
Instruction Latency Summary ............................................................................ 6-45
7.1
7.2
7.2.1
7.2.1.1
7.2.1.2
7.2.1.3
7.2.1.3.1
7.2.1.3.2
7.2.2
7.2.2.1
7.2.2.1.1
7.2.2.1.2
7.2.2.2
7.2.2.2.1
7.2.2.2.2
7.2.3
7.2.3.1
7.2.3.1.1
7.2.3.1.2
7.2.3.1.3
7.2.3.1.4
7.2.3.2
7.2.3.2.1
7.2.3.2.2
7.2.3.3
7.2.4
7.2.4.1
7.2.4.1.1
7.2.4.1.2
x
Chapter 7
Signal Configuration ............................................................................................ 7-2
Signal Descriptions .............................................................................................. 7-3
Address Bus Arbitration Signals ...................................................................... 7-3
Bus Request (BR)--Output ......................................................................... 7-4
Bus Grant (BG)-lnput ............................................................................... 7-4
Address Bus Busy (ABB) ............................................................................ 7-5
Address Bus Busy (ABB)--Output ......................................................... 7-5
Address Bus Busy (ABB)-Input ........................................................... 7-5
Address Transfer Start Signals ........................................................................ 7-6
Transfer Start (TS) ....................................................................................... 7-6
Transfer Start (TS)--Output .................................................................... 7-6
Transfer Start (TS)-Input ...................................................................... 7-6
Extended Address Transfer Start (XA TS) ................................................... 7-6
Extended Address Transfer Start (XATS)--Output. ............................... 7-6
Extended Address Transfer Start (XA TS)-Input .................................. 7-7
Address Transfer Signals ................................................................................. 7-7
Address Bus (AO-A31) ................................................................................ 7-7
Address Bus (AO-A31)-lnput (Memory Operations) ........................... 7-7
Address Bus Parity (APO-AP3) ................................................................... 7-8
Address Bus Parity (APO-AP3)--0utput ............................................... 7-8
Address Bus Parity (APO-AP3)-Input .................................................. 7-9
Address Parity Error (APE}-Output.. ........................................................ 7-9
Address Transfer Attribute Signals .................................................................. 7-9
Transfer Type (TTO-TT4) ......................................................................... 7-10
Transfer Type (TTO-TT4}-0utput ...................................................... 7-10
Transfer Type (TTO-TT4)-Input ......................................................... 7-10
PowerPC 604 RISC Microprocessor User's Manual

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