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3
Signal Path and Control Circuitry
The CDCM9102 supports either a crystal input or a single-ended clock with a 25-MHz input frequency.
Supported output types include LVPECL, LVDS, and LVCMOS. An optional bypassed LVCMOS output is
also available.
4
Getting Started
The EVM has self-explanatory labeling. Additionally, the naming conventions for the EVM correspond to
those in the device data sheet. Words in bold italics in this document show the same name and label as
on the EVM board. The EVM can use either a crystal input or external, single-ended clock input.
4.1
Power-Supply Connection
Connect the power-supply source to the banana plug with a 3.3V (P4) label, and connect the ground of
the power-supply source to GND (P5). Decoupling capacitors and ferrite bead isolate the device power
pins dedicated for the PLL from the other power pins.
This EVM can operate from a 3-V to 3.6-V supply voltage.
5
Input Clock Selection
The CDCM9102EVM offers the options to use either a crystal or a single-ended clock source as the clock
input.
5.1
Configuring a Crystal Input
The EVM is available with an optional 25-MHz crystal. The EVM offers a dual footprint for a 6-pin (5 mm x
7 mm) and 4-pin (3 mm x 5 mm) crystal. For a parallel-load resonant crystal, the configuration must be
similar to that in
Figure
NOTE: This configuration assumes that the crystal is placed very close to the XIN pin on the device.
Figure 2. CDCM9102EVM Configuration With Parallel-Load Resonant Crystal Clock Source
SCAU048 – March 2012
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2.
C62
2 pF
Copyright © 2012, Texas Instruments Incorporated
XIN
C
IN
8 pF
CDCM9102
CDCM9102EVM Clock Evaluation Module
Signal Path and Control Circuitry
3
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