B-1 20-Tap Fir Filter Example - Motorola DSP56000 Manual

24-bit digital signal processor
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page 132,66,0,6
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;********************************************************
;Motorola Austin DSP Operation
;********************************************************
;DSP56000/1
;20 - tap FIR filter
;File name: 1-56.asm
;*********************************************************************************************************************
;
Maximum sample rate: 379.6 kHz at 20.5 MHz/500.0 kHz at 27.0 MHz
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Memory Size: Prog: 4+6 words; Data: 2x20 words
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Number of clock cycles: 54 (27 instruction cycles)
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Clock Frequency: 20.5 MHz/27.0 MHz
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Instruction cycle time: 97.6 ns/74.1 ns
;*********************************************************************************************************************
;
This FIR filter reads the input sample
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from the memory location Y:input
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and writes the filtered output sample
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to the memory location Y:output
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The samples are stored in the X memory
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The coefficients are stored in the Y memory
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x(n)
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Figure B-1 20-Tap FIR Filter Example (Sheet 1 of 2)
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B - 6
BENCHMARK PROGRAMS
June 30, 1988
X MEMORY
R0
X(n)
t
X(n-1)
X(n-k+1) X(n+1)
t+T
C(0)
X
T
C(1)
X
T
C(2)
X
T
C(K-1)
X
FIR
BENCHMARK PROGRAMS
Y MEMORY
c(0)
t,t+T
c(1)
c(k-1)
y(n)
+
k 1
y n ( )
c p ( )
×
(
=
n
p
0
=
)
p
MOTOROLA

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