Host Interface Programming Model; Host Transmit Data Register (Htx); Receive Byte Registers (Rxh, Rxl); Transmit Byte Registers (Txh, Txl) - Motorola DSP56156 Manual

5.2

HOST INTERFACE PROGRAMMING MODEL

The HI has two programming models - one for the DSP56156 programmer and one for
the host processor programmer. In most cases, the notation used in this manual reflects
the DSP56156 perspective. The Host Interface - DSP56156 Programming Model is
shown in Figure 5-2. The programming model register names on the DSP CPU side of the
HI begin with the letter "H". The Host Interface - Host Processor Programming Model is
shown in Figure 5-3. The HI Interrupt Structure is shown in Table 5-2.
5.3

HOST TRANSMIT DATA REGISTER (HTX)

The Host Transmit register (HTX) is used for DSP to host processor data transfers. The
HTX register is viewed as a 16-bit write-only register by the DSP. Writing the HTX register
clears HTDE. The DSP may program the HTIE bit to cause a Host Transmit Data interrupt
when HTDE is set. The HTX register is transferred as 16-bit data to the Receive Byte Reg-
isters RXH:RXL if both the HTDE bit and the Receive Data Full, RXDF, status bit are
cleared. This transfer operation sets RXDF and HTDE.
5.4

RECEIVE BYTE REGISTERS (RXH, RXL)

The Receive Byte Registers are viewed as two 8-bit read-only registers by the host pro-
cessor called Receive High (RXH) and Receive Low (RXL). These two registers receive
data from the high byte and low byte respectively of the Host Transmit Data register HTX
and are selected by three external Host Address inputs HA2, HA1 and HA0 during a host
processor read operation or by an on-chip address counter in DMA operations. The Re-
ceive Byte Registers (at least RXL) contain valid data when the Receive Data Register
Full RXDF bit is set. The host processor may program the RREQ bit to assert the external
Host Request HREQ pin when RXDF is set. This informs the host processor or DMA con-
troller that the Receive Byte Registers are full. These registers may be read in any order
to transfer 8- or 16-bit data. However, reading the Receive Low register RXL clears the
Receive Data Full RXDF bit. Because reading RXL clears the RXDF status bit, it is nor-
mally the last register read during a 16-bit data transfer.
5.5

TRANSMIT BYTE REGISTERS (TXH, TXL)

The Transmit Byte Registers are viewed as two 8-bit write-only registers by the host pro-
cessor called Transmit High (TXH) and Transmit Low (TXL). These two registers send
data to the high byte and low byte respectively of the Host Receive Data register (HRX)
and are selected by three external Host Address inputs HA2, HA1 and HA0 during a host
processor write operation. Data may be written into the Transmit Byte Registers when the
Transmit Data Register Empty TXDE bit is set. The host processor may program the
TREQ bit to assert the external Host Request HREQ pin when TXDE is set. This informs
MOTOROLA

HOST INTERFACE PROGRAMMING MODEL

HOST INTERFACE 5 - 5