Mass Erase; Figure 9. Mass Erase Operation Flowchart - Holtek HT32F52220 User Manual

32-Bit Arm ® Cortex ® -M0+ MCU
HT32F52220/HT32F52230

Mass Erase

The FMC provides a mass erase function which is used to initialize all the main Flash memory
contents to a high state. The following steps show the mass erase operation register access
sequence.
▄
Check the OPCR register to confirm that no Flash memory operation is in progress (OPM [3:0]
equal to 0xE or 0x6). Otherwise, wait until the previous operation has been finished.
▄
Write the mass erase command to the OCMR register (CMD [3:0] = 0xA).
▄
Commit the mass erase command to the FMC by setting the OPCR register (set OPM [3:0]=0xA).
▄
Wait until all operations have been finished by checking the value of the OPCR register (OPM
[3:0] equals to 0xE).
▄
Read and verify the Flash memory if required.
Since all Flash data will be reset as 0xFFFF_FFFF, the mass erase operation can be implemented
by the program that runs in the SRAM or by the debugging tool that access the FMC register
directly. The software function that is executed on the Flash memory should not trigger a mass
erase operation. The following figure shows the mass erase operation flow.

Figure 9. Mass Erase Operation Flowchart

Rev. 1.10
Start
No
Is OPM equal to 0xE or 0x6 ?
Yes
Set OCMR = 0xA
Commit command
by setting OPCR
No
Is OPM equal to 0xE ?
Yes
Finish
35 of 366 November 09, 2018