ABB RES670 Technical Manual page 773

Relion 670 series, phasor measurement unit
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1MRK 511 408-UUS A
Phasor measurement unit RES670 2.2 ANSI
Technical manual
External
synchronization
sources
Off
GPS
IRIG-B
IEC140000113 V2 EN-US
Figure 293:
Design of the time system (clock synchronization)
All time tagging is performed by the software clock. When, for example, a status signal
is changed in the protection system of a function based on the free running hardware
clock, the event is time tagged by the software clock when it reaches the event
recorder.
SyncLostMode is not required to set as Block/BlockonLostUTC when differential
protection is based on ECHO mode.
Fast clock synchronization mode
At start-up and after interruptions in the GPS, PTP or IRIG B time signals, the
deviation between the external time system and the internal differential time system
can be substantial. A new start-up is also required, for example, after maintenance of
the auxiliary voltage system.
When the time difference is < 16 μs, the line differential protection function is blocked
and the time regulator for the hardware clock automatically uses a fast mode to
synchronize the clock systems. Time adjustment is made with an exponential function,
that is, with big time adjustment steps in the beginning, and then smaller steps until a
time deviation between the GPS time and the differential time system of < 16 μs has
PTP(IEEE 1588)
Off
On
Time tagging and general synchronization
Slave only
Commu-
nication
Time
regulator
(Setting:
SW time
see
Technical
manual)
Synchronization for differential protection
HW time
Time
regulator
A/D
converter
Section 22
Basic IED functions
Protection
Events
and control
functions
(Echo mode or GPS)
Diff.
Mergin
commu-
units*
nication
*IEC 61850-9-2
IEC140000113-2-en.vsdx
767

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