ABB RES670 Technical Manual page 484

Section 15
Logic
478
Figure 187 describes the simplified logic of the function where the block "Time
Integration" covers the logics for the first two items listed above while the block
"Transgression Supervision Plus Retain" contains the logics for the last two.
tWarning
tAlarm
BLOCK
RESET
IN
IEC12000195 V4 EN-US
Figure 187: TEIGAPC Simplified logic
TEIGAPC main functionalities
• integration of the elapsed time when IN has been high
• applicable to long time integration (≤999 999.9 seconds)
• output ACCTIME presents integrated value in seconds
• integrated value is retained in nonvolatile memory
• any retained value with a warning/alarm/overflow is used as initiation value
for the integration following by a restart
• RESET: Reset of the integration value. Consequently all other outputs are also
reset
• unconditionally on the input IN value
• reset the value of the nonvolatile memory to zero
• BLOCK: Freeze the integration and block/reset the other outputs
• unconditionally on the signal value
• BLOCK request overrides RESET request
• Monitor and report the conditions of limit transgression
Loop Delay
Transgression Supervision
Time Integration
Loop Delay
1MRK 511 408-UUS A
OVERFLOW
WARNING
Plus Retain
IEC12000195-4-en.vsd
Phasor measurement unit RES670 2.2 ANSI
Technical manual
ALARM
ACCTIME