Main Logic - ABB RES670 Technical Manual

1MRK 511 408-UUS A
13.2.7.4
Phasor measurement unit RES670 2.2 ANSI
Technical manual
Dead Line Detection
IA
IB
IC
IDLDPU
VA
VB
VC
VDLDPU
intBlock
ANSI0000035 V1 EN-US
Figure 133: Simplified logic diagram for Dead Line detection part

Main logic

A simplified diagram for the functionality is found in figure 134. The fuse failure
supervision function (FUFSPVC) can be switched on or off by the setting parameter
Operation to Enabled or Disabled.
For increased flexibility and adaptation to system requirements an operation mode
selector, OpModeSel, has been introduced to make it possible to select different
operating modes for the negative and zero sequence based algorithms. The different
operation modes are:
• Disabled. The negative and zero sequence function is disabled.
• V2I2. Negative sequence is selected.
• V0I0. Zero sequence is selected.
• V0I0 OR V2I2. Both negative and zero sequence are activated and work in parallel
in an OR-condition.
• V0I0 AND V2I2. Both negative and zero sequence are activated and work in series
(AND-condition for operation).
• OptimZsNs. Optimum of negative and zero sequence current (the function that has
the highest magnitude of measured negative and zero sequence current will be
activated).
Secondary system supervision
a
a<b
b
AND
a
a<b
b
a
a<b
b
AND
a
a<b
b
AND
a
a<b
b
AND
a
a<b
b
Section 13
AllCurrLow
DeadLineDet1Ph
DLD1PH
OR
AND
AND
DLD3PH
AND
ANSI0000035-1-en.vsd
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377