Samsung S5PC110 Manual page 1868

S5PC110_UM
IISCON
TXDMAPAUSE
RXDMAPAUSE
TXCHPAUSE
RXCHPAUSE
TXDMACTIVE
RXDMACTIVE
I2SACTIVE
Bit
[6] Tx DMA operation pause command. Note that when this
bit is activated at any time, the DMA request will be
halted after current on-going DMA transfer is completed.
0 = No pause DMA operation
1 = Pause DMA operation
[5] Rx DMA operation pause command. Note that when this
bit is activated at any time, the DMA request will be
halted after current on-going DMA transfer is completed.
0 = No pause DMA operation
1 = Pause DMA operation
[4] Tx channel operation pause command. Note that when
this bit is activated at any time, the channel operation
will be halted after left-right channel data transfer is
completed.
0 = No pause operation
1 = Pause operation
[3] Rx channel operation pause command. Note that when
this bit is activated at any time, the channel operation
will be halted after left-right channel data transfer is
completed.
0 = No pause operation
1 = Pause operation
[2] Tx DMA active (start DMA request). Note that when this
bit is set from high to low, the DMA operation will be
forced to stop immediately.
0 = Inactive
1 = Active
[1] Rx DMA active (start DMA request). Note that when this
bit is set from high to low, the DMA operation will be
forced to stop immediately.
0 = Inactive
1 = Active
[0] IIS interface active (start operation).
0 = Inactive
1 = Active
Description
3 IIS-BUS INTERFACE
R/W Initial State
R/W 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
R/W 1'b0
3-17