Samsung S5PC110 Manual page 1593

S5PC110_UM
9.2.2.6 MIXER_VIDEO_CFG Register (MIXER_VIDEO_CFG, R/W, Address = 0xF920_0014)
MIXER_VIDEO_CFG
Reserved
REG_LIMITER_EN
REG_BLEND_EN
Reserved
REG_ALPHA_VID
NOTE: All changes to this register are valid on a vertical sync signal of next frame.
9.2.2.7 MIXER_VIDEO_LIMITER_PARA_CFG Register (MIXER_VIDEO_LIMITER_PARA_CFG, R/W, Address
= 0xF920_0018)
MIXER_VIDEO_LIMITER_
PARA_CFG
REG_PARA_Y_UPPER
REG_PARA_Y_LOWER
REG_PARA_C_UPPER
REG_PARA_C_LOWER
NOTE: All changes to this register are valid on a vertical sync signal of next frame.
Bit
[31:18] Reserved, read as zero, do not modify
[17] YUV limiter for xvYcc
0 = Disables
1 = Enables
[16] If set to 1, it enables the blending of the entire video layer
onto the lower layer using the blending factor,
REG_ALPHA_VID.
[15:8] Reserved, read as zero, do not modify
[7:0] Video layer blending factor. This factor is used over all
the pixels in the video layer to blend with lower layer.
α * video_layer_pixel_value + (1 – α) *
lower_layer_pixel_value
If REG_ALPHA_VID is 0, α is 0.
If REG_ALPHA_VID is not 0,
α = (REG_ALPHA_VID + 1)/256.
Bit
[31:24] Upper bound for Y parameter of the limiter
[23:16] Lower bound for Y parameter of the limiter
[15:8] Upper bound for C parameter of the limiter
[7:0] Lower bound for C parameter of the limiter
Description
Description
9 8BMIXER
Initial State
0
0
0
0
0
Initial State
0xEB
0x10
0xF0
0x10
9-13