Samsung S5PC110 Manual page 1577

S5PC110_UM
8.4.1.76 Video Processor Brightness offset Control Register for Y (PP_BRIGHT_OFFSET, R/W, Address =
0xF910_0238)
PP_BRIGHT_OFFSET
Reserved
PP_BRIGHT_OFFSET
NOTE: Figure 8-8 shows examples of how VP controls brightness and contrast of image sequence using PP_LINE_EQ0
~ PP_LINE_EQ7 registers and PP_BRIGHT_OFFSET register. Input to output luminance mapping curve is
approximated by 8 sub-lines described by PP_LINE_EQ0 ~ PP_LINE_EQ7. Consequently, brightness and contrast is
controlled in very flexible way.
Bit
[31:9] Reserved, read as zero, do not modify
[8:0] Offset for Y brightness control (Signed 1.8 format)
Bright enhanced Y = Org Y + BRIGHT_OFFSET
0xFF : +255
0x1 : + 1
0x0 : 0
0x1FF : – 1
0x100 : - 256
255
223
191
159
127
brighten
image
95
63
contrast
31
0 31 63
Figure 8-8 Image Brightness & Contrast Control
Description
...
...
95 127 159
INPUT Luminance
8 7BVIDEO PROCESSOR
darken
image
191 223 255
Initial State
0
0
8-43