Samsung S5PC110 Manual page 1413

Risc microprocessor
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S5PC110_UM
6.3.2.1.13 FIRMWARE Version Register (MFC_FIRMWARE_VERSION, R, Address = 0xF170_0058)
MFC_FIRMWARE_
VERSION
Reserved
YEAR
MONTH
DAY
6.3.2.1.14 Debug Information Output Register1 (DBG_INFO_OUTPUT1, R, Address = 0xF170_0064)
DBG_INFO_OUTPUT1
INTERMEDIATE_
STAGE_COUNTER
6.3.2.1.15 Debug Information Output Register2 (DBG_INFO_OUTPUT2, R, Address = 0xF170_0068)
DBG_INFO_OUTPUT1
EXCEPTION_STATUS
6.3.2.1.16 Firmware Status Register (MFC_FIRMWARE_STATUS, R, Address = 0xF170_0080)
MFC_FIRMWARE_
STATUS
Reserved
FIRMWARE_STATUS
Bit
[31:24]
Reserved
[23:16]
Year : 00~99 (00 means 2000)
[15:8]
Month : 1~12
[7:0]
Day : 1~31
Bit
[31:0]
Intermediate stage counter in the code execution.
This counter values will have different interpretation for
each codec.
Bit
[31:0]
The status of the exception handler
0x01 = Bus error handler
0x02 = Illegal instruction handler
0x04 = Tick handler
0x10 = Trap handler
0x20 = Align handler
0x40 = Range handler
0x80 = DTLB miss exception handler
0x100 = ITLB miss exception handler
0x200 = Data page fault exception handler
0x400 = Instruction page fault exception handler
Bit
[31:1]
Reserved
[0]
0 = Not ready
1 = Ready
Description
Description
Description
Description
6 5BMULTI FORMAT CODEC
Initial State
0
0
0
0
Initial State
0
Initial State
0
Initial State
0
0
6-21

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