Samsung S5PC110 Manual page 1683

Risc microprocessor
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S5PC110_UM
10.3.3.81 Video Mode Register (VIDEO_PATTERN_GEN, R/W, Address = 0xFA11_05C4)
VIDEO_PATTERN_GEN
-
Ext_Video_En
Video Pattern Enable
10.3.3.82 Video Mode Register (HPD_GEN, R/W, Address = 0xFA11_05C8)
HPD_GEN
HPD_Duration
Bit
[7:2]
Reserved
[1]
0 = Ext off
1 = Ext on
[0]
0 = Disables
1 = Uses internally generated video pattern
Bit
[7:0]
Specifies the number of cycles for determining stable
HPD input.
Internal count = TMDS clock * HPD_Duration * 16
(cycles)
Default value = 0x1 (16 TMDS clock cycles)
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Description
Initial State
6b000000
0
0
Initial State
0x01
10-74

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