Samsung S5PC110 Manual page 1432

Risc microprocessor
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S5PC110_UM
6.3.3.2 Channel and Stream Interface Registers
There are two sets of channels to communicate between host and MFC. Each channel has two types of
registers. One is for response from MFC through MFC_SI_RTN_CHID and 15 MFC_COMMON_SI_RG registers.
The other is for command from host through the MFC_SI_CH_INST_ID register and 15
MFC_COMMON_CHx_RG registers.
6.3.3.2.1 Return CH Instance ID Register (MFC_SI_RTN_CHID, R/W, Address = 0xF170_2000)
MFC_SI_RTN_CHID
RTN_CHID
6.3.3.2.2 Common SI Register 1 ~ 15
MFC_COMMON_SI_RG_1, R/W, Address = 0xF170_2004
MFC_COMMON_SI_RG_2, R/W, Address = 0xF170_2008
MFC_COMMON_SI_RG_3, R/W, Address = 0xF170_200C
MFC_COMMON_SI_RG_4, R/W, Address = 0xF170_2010
MFC_COMMON_SI_RG_5, R/W, Address = 0xF170_2014
MFC_COMMON_SI_RG_6, R/W, Address = 0xF170_2018
MFC_COMMON_SI_RG_7, R/W, Address = 0xF170_201C
MFC_COMMON_SI_RG_8, R/W, Address = 0xF170_2020
MFC_COMMON_SI_RG_9, R/W, Address = 0xF170_2024
MFC_COMMON_SI_RG_10, R/W, Address = 0xF170_2028
MFC_COMMON_SI_RG_11, R/W, Address = 0xF170_202C
MFC_COMMON_SI_RG_12, R/W, Address = 0xF170_2030
MFC_COMMON_SI_RG_13, R/W, Address = 0xF170_2034
MFC_COMMON_SI_RG_14, R/W, Address = 0xF170_2038
MFC_COMMON_SI_RG_15, R/W, Address = 0xF170_203C
MFC_COMMON_SI_RG_
1 ~ 15
MFC_CH_COMMON_SI_R
G_1 ~ 15
NOTE: Note that the registers from 0xF170_2040 to 0xF170_207C have the same functionality as those from 0xF170_2080
to 0xF170_20BC. The registers from 0xF170_2040 to 0xF170_207C are used for channel 0 and those from
0xF170_2080 to 0xF170_20BC are for channel 1.
Bit
[31:0]
Return channel instance ID which is used to identify
which channel's operation is done
Bit
[31:0]
For specific meaning of each registers, refer to
and
6.3.3.3
Description
Description
.
6.3.3.4
6 5BMULTI FORMAT CODEC
Initial State
0
Initial State
0
6-40

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