Samsung S5PC110 Manual page 1447

S5PC110_UM
6.3.4 ENCODING REGISTERS
6.3.4.1 Common Encoder Register
6.3.4.1.1 Picture Type Control Register (ENC_PIC_TYPE_CTRL, R/W, Address = 0xF170_C504)
ENC_PIC_TYPE_CTRL
Reserved
ENC_PIC_TYPE_ENABLE
B_FRM_CTRL
I_FRM_CTRL
6.3.4.1.2 B-Picture Recon Picture Writing Control Register (ENC_B_RECON_WRITE_ON, R/W, Address =
0xF170_C508)
ENC_B_RECON_WRITE_ON
Reserved
B_RECON_ON
NOTE: When B_RECON_ON is enabled, host has to allocate B_FRAME_RECON_LUMA_ADDR
(0x062C) and B_FRAME_RECON_CHROMA_ADDR (0x0630). The size should be as follows:
- Sizeof(B_FRAME_RECON_LUMA_ADDR) = align(align(x_size, 128) * align(y_size, 32), 8192)
- Sizeof(B_FRAME_RECON_CHROMA_ADDR) = align(align(x_size, 128) * align(y_size/2, 32), 8192)
Bit
[31:19] Reserved
[18] 0 = Disable ENC_PIC_TYPE_CTRL
1 = Enable ENC_PIC_TYPE_CTRL[17:0] for picture
type setting
[17:16] 0 = The number of B frames is zero
1 = The number of B frames is one
2 = The number of B frames is two
3 = Reserved
[15:0] 0 = All P frames
1 = All I frames
2 = I – P – I – P
3 = I – P – P – I
N = (N-1) P frames between two I frames
Bit
[31:1] Reserved
[0] This register is used for debugging. By default, it is
set to zero. If it is set, it is required to allocate the
required memory.
0 = Disable recon data write at B-frame
1 = Enable recon data write at B-frame
Description
Description
6 5BMULTI FORMAT CODEC
Initial State
0
0
0
0
Initial State
0
0
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