Samsung S5PC110 Manual page 1644

Risc microprocessor
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S5PC110_UM
10.3.3 HDMI CORE REGISTER
10.3.3.1 Control Registers (HDMI_CON_0, R/W, Address = 0xFA11_0000)
HDMI_CON_0
MHL_CLK_En
MHL_En
Blue_Scr_En
Encoding_Option
-
Asp_E
-
System_En
Bit
[7]
Controls the MHL interface clock.
0 = Disables
1 = Enables
[6]
Enables the MHL interface.
0 = Disables
1 = Enables
[5]
Enables blue screen mode. When set, the input video
pixels are discarded and blue screen register values are
transmitted for all video data period.
0 = Disables
1 = Enables
[4]
Specifies the 10-bit TMDS encoding bit order option.
0 = Reverses the bit order during 10-bit encoding (to be
set to 1 when connecting to TMDS PHY 1.3)
1 = Retains the bit order as is
[3]
Reserved
[2]
Generates audio sample packet. This bit is only valid
when SYSTEM_EN is set.
0 = Discards audio sample
1 = Generates audio sample packet after receiving the
audio sample
[1]
Reserved
[0]
Enables HDMI system.
0 = No op
1 = Enables HDMI
10 9BHIGH-DEFINITION MULTIMEDIA INTERFACE
Description
Initial State
0
0
0
0
0
0
0
0
10-35

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